Cognichip launches ACI Enterprise, physics-informed AI for chip design

Redwood City startup Cognichip said its ACI Enterprise system — Artificial Chip Intelligence built on physics-informed models for semiconductor design — is now commercially available, naming customers including Renesas and SiTime, and claiming that in one unnamed top-20 fabless benchmark a single engineer moved a 55-page specification through micro-architecture, RTL, verification, and power-performance-area work in days instead of months; Cognichip says it has raised $93 million in total.

Chip design is still slow and expensive while AI demand explodes. Same-day Cognichip primary shows a real product, with named chipmakers, trying to compress front-end design with domain-specific AI instead of bolting a chatbot onto existing tools — a company launch with customer quotes, not a peer-reviewed speed claim.

Cognichip, a Redwood City semiconductor-AI startup, said via its company newsroom and a same-day WebWire press release dated Monday 14 Sep 2026 that ACI Enterprise is now commercially available. ACI, the company says, stands for Artificial Chip Intelligence. It calls the product full-stack intelligence infrastructure for chip design — software meant to help engineers move from an idea to a working chip plan. That company page, plus the WebWire reprint of the same release, is the filing event. These are company claims. This desk did not install the system.

The company says the models are physics-informed and purpose-built for chip design, not general-purpose large-language-model wrappers. A large language model, or LLM, is the general chatbot-style AI most people already know. Physics-informed, as Cognichip uses it here, means the models are trained with semiconductor physics in mind instead of only everyday text. Founder and CEO Faraj Aalaei said the firm “made a fundamental bet that general-purpose LLM wrappers could never handle the rigor and mathematical precision required for hardware engineering,” and that customers are “compressing development cycles while protecting their core intellectual property.” File those as his words, via the company release.

Named customers in the release include Renesas and SiTime. Manoher Bommena, vice president of engineering at Renesas, said Cognichip’s ACI “simply ‘speaks chip,’” and that the system showed “significant turnaround time improvements” from analyzing specifications to creating and verifying IPs — reusable blocks of chip design. Fari Assaderghi, executive vice president of engineering and operations at SiTime, said ACI Enterprise is “a powerful design system for the digital section of our mixed-signal ICs,” and that self-optimizing digital logic “resolves integration issues early.” File both quotes as customer endorsements on the company page. This desk did not audit those designs.

Farhad Shafai, head of business solutions at Altera, is also quoted. He said physical AI needs silicon that can evolve, that Altera FPGAs offer a reconfigurable architecture, and that Cognichip’s AI-native design “highlights the potential to help developers bring physical AI concepts to Altera’s programmable platforms more efficiently.” An FPGA, or field-programmable gate array, is a chip you can reconfigure after it is built. File the quote as Altera’s, via the company release — not as a claim this desk timed an FPGA build.

After more than two years of research and development, the company says ACI Enterprise is operational across more than 40 engagements, including Renesas and SiTime. File “more than 40” as Cognichip’s count. This desk did not see a customer list.

The company also reports an unnamed “global top-20 fabless” benchmark. Fabless means a chip company that designs chips but pays someone else to make them. Cognichip says a single engineer used ACI on a 55-page specification and finished micro-architecture, RTL design, functional verification, and power-performance-area optimization for an advanced ASIC in a few days. RTL, or register-transfer level, is the code engineers write to describe how a chip moves data. PPA means power, performance, and area — the three tradeoffs that decide whether a chip is too hot, too slow, or too big. An ASIC is a custom chip built for one job. Traditionally, the company says, that work took a full front-end team about four to five months. File the days-versus-months line as a company claim. It is not an independent audit, and the customer is not named.

Cognichip markets four “industry firsts”: physics-informed foundation models for chip design; full-stack intelligence infrastructure; AI-native workflows it slogans as “the model is the design”; and an idea-to-bits FPGA path for physical AI. File those four as company marketing, not as a ranking this desk ran against every rival tool.

On security, the company says design “alpha” — the secret know-how that makes one chipmaker’s architecture different — stays inside the customer’s firewall under a zero-trust setup, rather than going into third-party training pipelines. It also says an independent SOC 2 Type II examination covered the system, with single sign-on and multi-factor login, and that multi-tenant separation keeps one customer’s work walled off from another’s. File those as Cognichip’s security claims. This desk did not read the SOC 2 report.

In the same about blurb, Cognichip says it has raised $93 million in total from Mayfield Fund, Lux Capital, FPV Ventures, Seligman Ventures, SBI Investment, and Candou Ventures. File $93 million as the company’s stated total. This release is a product launch, not a new funding-round announcement. This desk is not inventing a valuation.

Forbes’ Karl Freund published a same-day wrap dated 14 Sep 2026 at 09:00 ET. Freund describes ACI as a physics-based approach rather than a general LLM, repeats the days-versus-months benchmark, and carries a roughly 100× speedup line plus an FPGA concept-to-working-code-in-hours claim. File those as Forbes repeating company claims. They are not a second originating newsroom and not an independent bake-off.

CONFIRMED here: Cognichip’s 14 Sep 2026 newsroom page and the same-day WebWire press release — PRIMARY company sources. REPORTED: Forbes’ same-day Karl Freund wrap. NOT claimed: an independent audit of the days-versus-months or 100× figures, a new funding round in this release, a valuation, a government mandate, that this desk tested ACI, a stock tip, or investment advice. Distinct from the already-filed nvidia-cuda-q-logical, fujitsu-monaka-cpu-sovereign-ai, asml-high-na-ai-chip-boom, and buildots-130m-data-center-ai.