Volantis raises $88M Series A for photonic AI inference that breaks the memory wall

Volantis said Thursday it raised an $88 million Series A co-led by Lachy Groom and Abstract Ventures to build A-1, a photonic AI inference system designed to raise memory capacity and bandwidth together so giant models can run faster at lower cost per token.

As agents do longer jobs, inference speed becomes the company clock. Today’s chips force a choice between holding a huge model and feeding it fast enough. Volantis is betting photonics can raise capacity and bandwidth together so those agents finish in minutes instead of half an hour — and investors just put $88 million behind that bet before the first customer engines arrive in 2027.

On Thursday, 1 October 2026, Volantis announced an $88 million Series A. A Series A is an early venture round: investors put money in for a share of the company. Lachy Groom and Abstract Ventures co-led it. Co-led means the two ran the round together. The release says the round also includes participation from John Doerr, VXI Capital, Triatomic, and Susa Ventures, plus angel investors Dwarkesh Patel, Naveen Rao, and Sholto Douglas. An angel, here, is a person writing a check, not a fund. Participation means those names put money in. The release does not say how much each one wrote. The dateline is San Francisco. PR Newswire carries the release, and the page stamps Oct 01, 2026, 09:00 ET, which is 9:00 a.m. Eastern. The source line is Volantis. Those lines are the release.

What Volantis says it is building. The release calls the company a semiconductor company building a new category of AI inference system. A semiconductor company designs chips. Inference is running a trained model so it answers. Training is the earlier job of teaching the model. The first system is named A-1. Volantis says A-1 is an AI inference architecture meant to eliminate the usual tradeoff between memory capacity and bandwidth. Capacity is how much the memory can hold. Bandwidth is how much data can move into the chip at once. The release says the link that is supposed to do this is a photonic interconnect built for chip-to-memory connections. Photonic means the data moves as light. An interconnect is the path between the processor and the memory. Those lines are Volantis’s.

The speed and size targets, as the release states them. A-1 is being designed to run models exceeding 20 trillion parameters at up to 10,000 tokens per second per user, while reducing inference cost per token. A parameter is one of the numbers inside a model that training set. Twenty trillion is the size the system is being designed to hold. A token is a small chunk of text, often a word or part of a word. Ten thousand tokens a second, for one user, is the company’s speed target. Cost per token is what it costs to handle each of those chunks. The release says that cost should come down. It does not print a dollar price. Those lines are Volantis’s. They are design targets. They are not a measured run on a system a customer has today.

Why the company says today’s chips force a choice. Running a large model fast takes two things at once: enough memory to hold the model, and enough bandwidth to keep feeding the chip. The release says existing designs make you pick. On-chip SRAM is fast memory built on the processor itself. It has high bandwidth and limited capacity, so it caps how large a model and how long a context can be, and it raises cost and energy use. A context is the amount of text the model can keep in front of it. GPUs and other systems that use HBM, high-bandwidth memory stacked beside the chip, hold more, and the release says their bandwidth still limits how fast they can serve ever-larger models. A GPU is the chip most AI runs on today. The release says even newer 3D DRAM, memory stacked in three dimensions, stays on that same tradeoff curve. Those lines are Volantis’s description of the industry. They are not a lab table from an outside test.

What A-1 is supposed to change, in the release’s words. Volantis is designing it to raise memory capacity and bandwidth together, by nearly two orders of magnitude. An order of magnitude is a tenfold jump. Two orders of magnitude is about 100 times. Nearly two means close to that hundredfold, not a printed score of exactly 100. The release says that would let larger models run at much higher inference speeds. It then gives an illustration, not a customer stopwatch: a coding agent that finishes a task in two minutes instead of 30 gives developers more chances to try an idea, ship software, and try again. Thirty minutes is half an hour. The release says that as agents take on longer work, inference speed is what decides how fast they finish. Those lines use the word could. They are the company’s picture of the payoff. They are not a timed job on a named product in a named office.

Tapa Ghosh, chief executive and co-founder, is quoted in the release. “As AI agents take on more work, how fast they complete that work will increasingly determine how fast companies can operate,” he said. “Today’s hardware forces a tradeoff between running the largest, most sophisticated models and running them fast. We started Volantis to eliminate that tradeoff.” That quotation is his, in the release.

How the light links are supposed to work, as the release describes them. Volantis says it is building a photonic interconnect specifically to connect compute chips to memory. Most photonics in data centers, the release says, has been about chip-to-chip links, moving data from one processor to another. Chip-to-memory is a different job. The release says those links have to move more than 100 times as much data, over much shorter distances, so the energy and the cost have to be different. More than 100 times, in that sentence, is about how much data has to travel. It is not the same sentence as the nearly hundredfold gain in capacity and bandwidth. An optical fabric, the company’s phrase, ties a large number of memory chips into one pool, and adds their bandwidth as more memory is added. That is how A-1 is supposed to raise capacity and bandwidth together, using cheaper memory that sits off the processor chip. Off-chip means the memory is not carved into the processor itself. Those lines are Volantis’s.

The laser, as the release describes it. The architecture uses custom micro-VCSELs instead of external lasers. A VCSEL is a vertical-cavity surface-emitting laser: a tiny laser built on a chip that shines straight out, rather than a separate laser box cabled in from outside. Micro means a smaller one the company says it designed. The release says this draws on the existing gallium arsenide VCSEL supply chain and avoids indium phosphide supply constraints. Gallium arsenide is the material those volume lasers are already made from. Indium phosphide is a different laser material, and the release says its supply is the tighter one. The company says the micro-VCSELs are small, stable across temperature, and low power, and that the end-to-end links use less than one picojoule per bit. A picojoule is a trillionth of a joule. A joule is a small unit of energy. Less than one picojoule per bit means each bit moved costs less than that trillionth of a joule, on the company’s claim. The release says Volantis plans to show more of the design as A-1 moves toward commercialization. Commercialization is the work of turning the design into something a customer can buy. Those lines are Volantis’s. They are not a published energy measurement from an outside lab.

Who the release says built it. The founding team includes semiconductor and photonics veterans from NVIDIA, AMD, Broadcom, and Ayar Labs. Their previous work, the release says, includes the first CoWoS product, the first high-volume tunable VCSELs, and early silicon photonics co-packaged optics. CoWoS, chip-on-wafer-on-substrate, is a way of packaging a processor and its memory close together. Tunable means the laser’s color of light can be adjusted. Co-packaged optics puts the optical parts in the same package as the chip, instead of on a separate board. Those are prior-work claims about the people. They are not a claim that A-1 is a CoWoS product shipping from NVIDIA, AMD, Broadcom, or Ayar Labs. The release does not name which founder did which of those earlier products.

When a customer is supposed to get one, and what the money is for. Volantis says it plans to deliver its first integrated inference engines to customers in 2027. An integrated engine, here, is the processor and the photonic memory put together as one system. The financing, the release says, will support development and commercialization of A-1 and its photonic memory architecture, including hiring more engineers and moving the system toward customer deployments. Development is the building. A deployment is a system placed with a customer. The release puts that delivery in 2027. It does not name a customer. It does not print a valuation, the price a buyer would put on the whole company. It does not say a finished A-1 is in a data center now.

The company site the same day carries a banner: “Our $88M Series A: Demolishing the Memory Wall With Photonics.” The homepage also prints lines that are not the wire’s sentences. It says the company is backed by Sam Altman, Jeff Dean, and others. Those names are not on the Series A list in the release. The release’s co-leads are Lachy Groom and Abstract Ventures, and its other named participants are John Doerr, VXI Capital, Triatomic, Susa Ventures, Dwarkesh Patel, Naveen Rao, and Sholto Douglas. The homepage says models above 10 trillion parameters and 10,000 tokens a second per user. The release says models exceeding 20 trillion parameters, at up to 10,000 tokens a second per user. The homepage says memory pools with more than 30 times the bandwidth and more than 50 times the size, and that optical reach is about 100 times longer than an electrical wire, so about 100 times more memory can sit next to a chip. It says electrical wires only reach about 2 millimeters. The release’s “nearly two orders of magnitude” is the capacity-and-bandwidth sentence. The homepage’s 30 times, 50 times, and optical-reach line are the homepage’s. They are not the same sentence.

The product page prints a separate set of design figures for A-1. It says the system is meant to fit existing data-center racks, using compute designs licensed from other companies that are already proven in silicon, with the new risk in the photonic link, which the page says the team has developed for more than four years. Silicon-proven, in that sentence, is about the licensed compute. It is not a statement that A-1 has already been delivered. The page prints 10 terabytes of memory capacity, 240 terabytes a second of memory bandwidth, 10 terabytes a second of off-wafer input and output, a 20-kilowatt power envelope, and a 15U form factor. A terabyte is a trillion bytes. Off-wafer means data leaving the round slice of silicon. A power envelope is the power the box is designed to draw. 15U is fifteen rack units, a bit more than two feet of a standard equipment cabinet. The same page prints comparison lines against NVIDIA’s Rubin platform: 15 times the tokens per dollar, 6 times the tokens per watt for low-latency mixture-of-experts models above one trillion parameters, and more than 30 times lower latency for large-model inference. A mixture-of-experts model routes each token to a few specialist parts instead of using the whole model every time. Latency is the wait. Those comparison lines are the product page’s. The release does not print them. The release’s customer date is 2027. The product page does not name a customer who has an A-1 now.

The picture is a desk graphic for the round. A maroon field is filled with a photonic wafer texture, the patterned chip surface. Lime type reads VOLANTIS, $88M SERIES A, PHOTONIC AI INFERENCE, and A-1. A line reads 20T+ PARAMETERS · 10,000 TOKENS / SEC. Another reads MEMORY AND BANDWIDTH, TOGETHER. It is a graphic of the round and the design targets. It is not a photograph of a system in a customer rack, and it does not print a calendar date.

In plain terms, Volantis said on Thursday that Lachy Groom and Abstract Ventures co-led an $88 million Series A to build A-1, a photonic inference system meant to raise memory capacity and bandwidth together. The release says the design target is models above 20 trillion parameters at up to 10,000 tokens a second per user, at a lower cost per token, with the first customer engines in 2027. The company site prints other multipliers, other backers, and a rack design with 10 terabytes of memory and 240 terabytes a second of bandwidth. Those site lines stay with the site. The release does not name a customer, and it does not print a valuation.